基于PPO的逻辑综合序列优化通用框架
PDF下载 (161)王梦可,杨朝晖,查晓婧,夏银水*.基于PPO的逻辑综合序列优化通用框架[J].宁波大学学报(理工版),2025,38(2):78-85.DOI:10.20098/j.cnki.1001-5132.2024.0204
WANG Mengke,YANG Zhaohui,ZHA Xiaojing,XIA Yinshui.PPO-based universal framework design for logic synthesis sequence optimization[J].Journal of Ningbo University(Natural Science & Engineering Edition),2025,38(2):78-85.DOI:10.20098/j.cnki.1001-5132.2024.0204
| Title: | PPO-based universal framework design for logic synthesis sequence optimization |
| 作者: | 王梦可, 杨朝晖, 查晓婧, 夏银水* |
| Author(s): | WANG Mengke, YANG Zhaohui, ZHA Xiaojing, XIA Yinshui |
| 关键词: | 逻辑综合; 序列优化; 强化学习; 近端策略优化 |
| Keywords: | logic synthesis; sequence optimization; reinforcement learning; proximal policy optimization |
| 分类号: | TP331.2; TN431.2 |
| DOI: | 10.20098/j.cnki.1001-5132.2024.0204 |
| 文献标识码: | A |
| 摘要: | 逻辑综合通常采用启发式方法将逻辑优化算法组成为序列进行电路性能优化, 而启发式方法难以根据电路和优化目标的差异进行序列自动化调节, 影响了电路优化质量. 为了在集成电路设计中提升序列的自适应生成能力, 将序列优化问题建模为马尔可夫决策过程, 提出一种面向多种逻辑表示的强化学习框架, 利用近端策略优化(Proximal Policy Optimization, PPO)指导智能体来探索序列优化空间, 改善其生成序列的泛化能力. 并将EPFL基准电路转变为与-非图(And-Inverter Graph, AIG)和异或多数图(Xor-Majority Graph, XMG)形式, 分别经由所提出的框架进行实验, AIG形式下本文方法与DRiLLS和BOiLS方法相比分别有18.66百分点和27.67百分点的性能提升; XMG形式下则可提升原始电路性能约37.34%. 实验结果表明, 由本文方法生成的算法序列对电路性能有较大改进. |
| Abstract: | Logic synthesis typically employs heuristic methods to compose a sequence of logic optimization algorithms for circuit performance improvement. However, heuristic methods face challenges in automatically adjusting sequences based on circuit and optimization objectives, thus affecting the quality of circuit optimization. In order to enhance the capability of adaptive sequence generation in integrated circuit design, this paper models the sequence optimization problem as a Markov Decision Process and proposes a reinforcement learning framework for multiple logic representations. The framework utilizes Proximal Policy Optimization (PPO) to guide the agent in exploring the sequence optimization space and improve the generalization ability of its sequence generation. The paper transforms EPFL benchmark circuits into AIG and XMG forms, respectively, and conducts experiments on them by using the proposed framework. Compared to DRiLLS and BOiLS methods, the proposed method achieves performance improvements of 18.66 percentages and 27.67 percentages in the AIG form, and approximately 37.34% improvement in the original circuit performance in the XMG form. The experimental results demonstrate significant improvements in circuit performance achieved by the algorithm sequences generated with the proposed method |
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| 备注/Memo: | 收稿日期: 2024−02−18. 宁波大学学报（理工版）网址: http://journallg.nbu.edu.cn/ 基金项目: 国家自然科学基金（62131010, U22A2013）; 国家自然科学基金青年项目（62304115）; 浙江省自然科学基金创新群体课题（LDT23F04021F04）; 浙江省科研计划一般项目（Y202248965）. 第一作者: 王梦可, 硕士研究生, 主要研究方向: 集成电路电子设计自动化. E-mail: 2111082020@nbu.edu.cn *通信作者: 夏银水, 教授, 主要研究方向: 低功耗集成电路设计及电子设计自动化. E-mail: xiayinshui@nbu.edu.cn 宁波大学学报（理工版）网址：http://journallg.nbu.edu.cn/ |
