基于正反馈异或/同或门的低延时混合逻辑加法器设计
PDF下载 (635)叶顺心,汪鹏君,温 亮,张跃军,张笑天.基于正反馈异或/同或门的低延时混合逻辑加法器设计[J].宁波大学学报(理工版),2020,33(2):28-34.DOI:
YE Shunxin,WANG Pengjun,WEN Liang,ZHANG Yuejun,ZHANG Xiaotian.Design of low delay hybrid logic adder based on positive feedback XOR/XNOR gate[J].Journal of Ningbo University(Natural Science & Engineering Edition),2020,33(2):28-34.DOI:
| Title: | Design of low delay hybrid logic adder based on positive feedback XOR/XNOR gate |
| 作者: | 叶顺心, 汪鹏君, 温 亮, 张跃军, 张笑天 |
| Author(s): | YE Shunxin, WANG Pengjun, WEN Liang, ZHANG Yuejun, ZHANG Xiaotian |
| 关键词: | 正反馈; 异或/同或门; 低延时; 阈值损失; 混合逻辑加法器 |
| Keywords: | positive feedback; XOR/XNOR gate; low delay; threshold loss; hybrid logic adder |
| 分类号: | TP332 |
| 文献标识码: | A |
| 摘要: | 针对采用传输管逻辑设计的加法器存在阈值损失以及延时过高等问题, 结合正反馈原理, 提出无阈值损失的低延时正反馈混合逻辑加法器设计方案. 该方案首先分析传输管异或门阈值损失机理, 利用正反馈环电平锁定特性, 设计无阈值损失的正反馈异或/同或门; 然后利用有比逻辑特定晶体管的尺寸差, 以减少正反馈异或/同或门输出延时; 最后融合传输管逻辑、传输门逻辑和静态互补CMOS逻辑等的优点, 实现无阈值损失且低延时的混合逻辑加法器. 在TSMC 65nm CMOS工艺下, HSPICE仿真结果表明, 所设计电路与传输门加法器相比延时和功耗延时积分别降低12.75%和10.88%. |
| Abstract: | In order to solve the problems of threshold loss and high delay in pass transistor logic adder, we propose a positive feedback hybrid logic adder with low delay and no threshold loss. Firstly, the threshold loss of pass transistor logic XOR gate is analyzed, and a full-swing XOR/XNOR gate is designed according to voltage locking of positive feedback circuit. Then, the delay of proposed gate is mitigated based on the size difference of transistors in proportional to the logic circuit. Lastly, by taking advantage of pass transistor logic, transmission gate logic and static complementary CMOS logic, a low delay hybrid logic adder with no threshold loss is designed. The simulation results indicate that the presented hybrid logic adder accomplishes 12.75% improvement in speed performance and 10.88% reduction in PDP as compared with the transmission gate full adder using a TSMC 65nm fabrication process. |
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| 备注/Memo: | 收稿日期: 2019－09－02. 宁波大学学报（理工版）网址: http://journallg.nbu.edu.cn/ 基金项目: 国家自然科学基金（61874078, 61871244）. 第一作者: 叶顺心（1995－）, 男, 浙江衢州人, 在读硕士研究生, 主要研究方向: 集成电路理论和设计. E-mail: 502940763@qq.com *通信作者: 汪鹏君（1966－）, 男, 浙江宁波人, 博士/教授, 主要研究方向: 集成电路理论和设计. E-mail: wangpengjun@nbu.edu.cn 宁波大学学报（理工版）网址：http://journallg.nbu.edu.cn/ |
